1. Field of the Invention
The invention is in the field of manufacturing integrated optical devices with at least one optical element, e.g. refractive and/or diffractive lens, in a well defined spatial arrangement on a wafer scale. Such integrated optical devices are, for example, camera devices, especially mobile phone cameras or cameras of other electronic devices. As an other example, the devices may be optics for camera devices. More concretely, the invention relates a method of fabricating a plurality of integrated optical devices on a wafer scale comprising stacking at least two wafer-scale elements in an axial (or ‘vertical’) direction, with a spacer arrangement between the two waver-scale elements. The invention further relates to an optical device manufactured by means of such a method.
2. Description of Related Art
Manufacturing of—active or passive—optical devices on a wafer scale is becoming increasingly important. A reason is the ongoing trend to make optical devices a low cost mass product. Optical devices, such as cameras or integrated camera optics, are nowadays integrated in a large percentage of any electronic devices manufactured, including mobile phones, computers, etc.
Of special interest are the wafer-scale fabrication processes, where an array of optical elements is fabricated on a large-scale, for example disk-like (“wafer-”) structure, which subsequent to replication is separated (“diced”) into the individual elements. In such wafer-scale manufacturing, for example, optical lenses are produced by providing a wafer and replicating an array of according refractive (and/or diffractive) optical elements thereon. The array is subsequently diced into the individual lenses, which then are assembled with other lenses and/or an optically active element such as a CMOS or CCD sensor array.
A disadvantage in this is that the individual assembling step is still a time consuming task. Therefore, it has been proposed, for example in U.S. patent application Ser. No. 12/180,175 incorporated herein by reference in its entirety, to assemble the different components on a wafer scale, and to carry out the dicing step only after the wafer-scale assembly. The wafers for this comprise optical, elements in a well-defined spatial arrangement on the wafer. Such a wafer scale package (wafer stack) comprises at least two wafers that are stacked along the axis corresponding to the direction of the smallest wafer dimension (axial direction) and attached to one another. At least one of the wafers bears passive optical elements, and the other can also comprise passive optical elements or can be intended to receive other functional elements, such as active optical elements (electro-optical elements such as CCD or CMOS sensor arrays). The wafer stack, thus, comprises a plurality of generally identical integrated optical devices arranged side by side. In such a wafer-scale assembly process, the corresponding individual components have to be aligned with sufficient accuracy. After stacking, the wafer stack is separated (‘diced) into the individual elements.
A first example of such a stack, subsequently diced, is a stack of two or more optical wafers. The optical wafers are transparent, wafer-like substrates that comprise arrays of optical lenses and/or other optical elements. The arrays of the optical elements are aligned with respect to each other, so that one or more optical elements of each wafer together with one or more corresponding optical elements of another wafer forms an optical sub-assembly, which after dicing is an integrated optical device that may form a functional unit (for example a camera optics) or sub-unit (for example a lens sub-assembly of a camera optics).
A further example of a stack subsequently diced is a stack of at least one optical wafer and in addition of an electro-optical wafer that may, for example, comprise an array of image sensor areas to be aligned with the corresponding array of optical elements, so that so that after dicing the integrated optical device with one or more optical elements of the optical wafer(s) together with one or more corresponding electro-optical elements of the electro-optical (semiconductor) wafer forms a functional unit (such as a camera module) or sub-unit (such as a sensor module for a camera). Some examples of such stacks are, for example, described in WO 2005/083 789.
In such a wafer stack, the at least two wafers are separated by spacer means, e.g. a plurality of separated spacers or an interconnected spacer matrix as disclosed in US 2003/0010431 or WO 2004/027880, and optical elements can also be arranged between the wafers on a wafer surface facing another wafer. Thus, a spacer is sandwiched between a top wafer and a bottom wafer. This arrangement may be repeated with further wafers and intermediary spacers.
In U.S. patent application Ser. No. 12/180,175, it has been proposed to use replicated spacer wafers of a plastic material.
If the wafer(s) and the spacer elements, especially if the spacer elements are spacer wafers or other spacer elements surrounding a plurality of optical elements, are of unequal material, a problem may arise when they are connected to each other. During fabrication processes, such as during curing of adhesive layers, the temperatures will not be constant, and with wafers with different thermal expansion coefficients there is a risk that the stack will bow during the curing process.